Saligram, R., Kaul, A., Bakir, M. S., & Raychowdhury, A. (2021). Multilevel Signalling for High-Speed Chiplet-to-Chiplet Communication. In VLSI-SoC New Technology Enabler (pp. 31–62). Springer.
@inbook{rama20,
author = {Saligram, Rakshith and Kaul, Ankit and Bakir, Muhannad S and Raychowdhury, Arijit},
title = {{M}ultilevel {S}ignalling for {H}igh-{S}peed {C}hiplet-to-{C}hiplet {C}ommunication},
booktitle = {{VLSI}-{S}o{C} {N}ew {T}echnology {E}nabler},
year = {2021},
publisher = {Springer},
editor = {},
pages = {31--62},
keywords = {bookchap}
}
Chen, Z., Gonde, K., Ravicz, K., Saligram, R., Schlesinger, M., & Wilner, M. (2016). Concluding Remarks. In Wireless Computing in Medicine: From Nano to Cloud with Ethical and Legal Implications (pp. 603–612). Wiley.
@inbook{cgrssw16,
author = {Chen, Zhaoqi and Gonde, Kalyani and Ravicz, Kodiak and Saligram, Rakshith and Schlesinger, Mike and Wilner, Mary},
title = {Concluding Remarks},
booktitle = {{W}ireless {C}omputing in {M}edicine: {F}rom {N}ano to {C}loud with {E}thical and {L}egal {I}mplications},
year = {2016},
publisher = {Wiley},
editor = {},
pages = {603--612},
keywords = {bookchap}
}
Refereed Journal Articles
Saligram, R., Raychowdhury, A., & Datta, S. (2024). (Invited) The Future is Frozen: Cryogenic CMOS for High Performance Computing . Elsevier Chip.
@article{ras23,
author = {Saligram, Rakshith and Raychowdhury, Arijit and Datta, Suman},
title = {\textit{({I}nvited)} {T}he {F}uture is {F}rozen: {C}ryogenic {CMOS} for {H}igh {P}erformance {C}omputing },
journal = {{E}lsevier {C}hip},
year = {2024},
month = mar,
volume = {},
number = {},
pages = {}
}
Gaidhane, A. D., Saligram, R., Chakraborty, W., Datta, S., Raychowdhury, A., & Cao, Y. (2023). Predictive Modeling and Benchmarking of Cryogenic FinFETs for Energy-Efficient Computing . IEEE Journal of Exploratory Solid-State Computational Devices and Circuits.
@article{arw1,
author = {Gaidhane, Amol D. and Saligram, Rakshith and Chakraborty, Wriddhi and Datta, Suman and Raychowdhury, Arijit and Cao, Yu},
title = {{P}redictive {M}odeling and {B}enchmarking of {C}ryogenic {F}in{FET}s for {E}nergy-{E}fficient {C}omputing },
journal = {{IEEE} {J}ournal of {E}xploratory {S}olid-{S}tate {C}omputational {D}evices and {C}ircuits},
year = {2023},
month = nov,
volume = {},
number = {},
pages = {}
}
Saligram, R., Datta, S., & Raychowdhury, A. (2022). Design Space Exploration of Interconnect Materials for Cryogenic Operation: Electrical and Thermal Analyses. IEEE Transactions on Circuits and Systems - I: Regular Papers, (TCAS-I).
@article{rsa5,
author = {Saligram, Rakshith and Datta, Suman and Raychowdhury, Arijit},
title = {{D}esign {S}pace {E}xploration of {I}nterconnect {M}aterials for {C}ryogenic {O}peration: {E}lectrical and {T}hermal {A}nalyses},
journal = {{IEEE} {T}ransactions on {C}ircuits and {S}ystems - I: {R}egular {P}apers, ({TCAS-I})},
year = {2022},
month = nov,
volume = {},
number = {},
pages = {}
}
Saligram, R., Chakraborty, W., Cao, N., Cao, Y., Datta, S., & Raychowdhury, A. (2021). Power Performance Analysis of Digital Standard Cells for 28nm Bulk CMOS at Cryogenic Temperature using BSIM models. IEEE Journal of Exploratory Solid-State Computational Devices and Circuits.
@article{rsa4,
author = {Saligram, Rakshith and Chakraborty, Wriddhi and Cao, Ningyuan and Cao, Yu and Datta, Suman and Raychowdhury, Arijit},
title = {{P}ower {P}erformance {A}nalysis of {D}igital {S}tandard {C}ells for 28nm {B}ulk {CMOS} at {C}ryogenic {T}emperature using {BSIM} models},
journal = {{IEEE} {J}ournal of {E}xploratory {S}olid-{S}tate {C}omputational {D}evices and {C}ircuits},
year = {2021},
month = dec,
volume = {},
number = {},
pages = {}
}
Wriddhi, C., Aabrar, K. A., Gomez, J., Saligram, R., Raychowdhury, A., & Datta, S. (2021). Characterization and Modeling of 22nm FDSOI Cryogenic RF CMOS. IEEE Journal of Exploratory Solid-State Computational Devices and Circuits.
@article{rsa3,
author = {Wriddhi, Chakraborty and Aabrar, Khandker Akif and Gomez, Jorge and Saligram, Rakshith and Raychowdhury, Arijit and Datta, Suman},
title = {{C}haracterization and {M}odeling of 22nm {FDSOI} {C}ryogenic {RF CMOS}},
journal = {{IEEE} {J}ournal of {E}xploratory {S}olid-{S}tate {C}omputational {D}evices and {C}ircuits},
year = {2021},
month = dec,
volume = {},
number = {},
pages = {}
}
Saligram, R., Datta, S., & Raychowdhury, A. (2021). CryoMem: A 4K-300K 1.3GHz Hybrid 2T-Gain-Cell based eDRAM Macro in 28nm Logic Process for Cryogenic Applications . (Invited), IEEE Solid State Circuit Letters, 4.
@article{rsa2,
author = {Saligram, Rakshith and Datta, Suman and Raychowdhury, Arijit},
title = {{C}ryoMem: {A} 4{K}-300{K} 1.3{G}Hz {H}ybrid 2{T-G}ain-{C}ell based e{DRAM} {M}acro in 28nm {L}ogic {P}rocess for {C}ryogenic {A}pplications },
journal = {(Invited), {IEEE} {S}olid {S}tate {C}ircuit {L}etters},
year = {2021},
month = nov,
volume = {4},
number = {},
pages = {}
}
Saligram, R., Datta, S., & Raychowdhury, A. (2021). Scaled Back End of Line Interconnects at Cryogenic Temperatures. IEEE Electron Device Letters, 42(11).
@article{sr12,
author = {Saligram, Rakshith and Datta, Suman and Raychowdhury, Arijit},
title = {{S}caled {B}ack {E}nd of {L}ine {I}nterconnects at {C}ryogenic {T}emperatures},
journal = {{IEEE} {E}lectron {D}evice {L}etters},
year = {2021},
month = nov,
volume = {42},
number = {11},
pages = {}
}
Bairy, B., Craig, T. S., Gonde, K., Gupta, N., Prajogi, A., Wilner, M., & Saligram, R. (2016). Mitigating the impact of NBTI and PBTI Degradation. Global Journal of Technology and Optimization, 7, 195.
@article{bcggpws16a,
author = {Bairy, Bhuvana and Craig, T. Soren and Gonde, Kalyani and Gupta, Naman and Prajogi, Andrew and Wilner, Mary and Saligram, Rakshith},
title = {Mitigating the impact of {NBTI} and {PBTI} {D}egradation},
journal = {Global {J}ournal of {T}echnology and {O}ptimization},
year = {2016},
volume = {7},
number = {},
pages = {195}
}
Saligram, R., Hegde, S., Kulkarni, S., Bhagyalakshmi, H. R., & Venkatesha, M. K. (2013). Design of Parity Preserving Logic Based Fault Tolerant Reversible Arithmetic Logic Unit. International Journal of VLSI Design and Communication Systems, 10.
@article{ssbv13,
author = {Saligram, Rakshith and Hegde, Shrihari and Kulkarni, Shashidhar and Bhagyalakshmi, HR and Venkatesha, MK},
title = {Design of {P}arity {P}reserving {L}ogic {B}ased {F}ault {T}olerant {R}eversible {A}rithmetic {L}ogic {U}nit},
journal = {International Journal of VLSI Design and Communication Systems},
year = {2013},
month = jun,
volume = {10},
publisher = {}
}
Saligram, R., Hegde, S. S., Kulkarni, S. A., Bhagyalakshmi, H. R., & Venkatesha, M. K. (2013). Design of Fault Tolerant Reversible Multiplexer Based Multi-Boolean Function Generator using Parity Preserving Gates. International Journal of Computer Applications.
@article{ssbv13a,
author = {Saligram, Rakshith and Hegde, {Shrihari S} and Kulkarni, {Shashidhar A} and Bhagyalakshmi, {H R} and Venkatesha, {MK}},
title = {Design of {F}ault {T}olerant {R}eversible {M}ultiplexer {B}ased {M}ulti-{B}oolean {F}unction {G}enerator using {P}arity {P}reserving {G}ates},
journal = {{I}nternational {J}ournal of {C}omputer {A}pplications},
year = {2013},
month = mar,
volume = {},
number = {},
pages = {}
}
Saligram, R., & Ravishankar, R. (2012). Design of Reversible Multipliers for Linear Filtering Applications in DSP. International Journal of VLSI Design and Communication Systems.
@article{sr121,
author = {Saligram, Rakshith and Ravishankar, Rakshith},
title = {Design of {R}eversible {M}ultipliers for {L}inear {F}iltering {A}pplications in {DSP}},
journal = {International Journal of VLSI Design and Communication Systems},
year = {2012},
month = dec,
volume = {},
number = {},
pages = {}
}
Saligram, R., & Ravishankar, R. (2012). Novel Code Converter Employing Reversible Lgic. International Journal of Computer Applications.
@article{sr12a,
author = {Saligram, Rakshith and Ravishankar, Rakshith},
title = {Novel {C}ode {C}onverter {E}mploying {R}eversible {L}gic},
journal = {{I}nternational {J}ournal of {C}omputer {A}pplications},
year = {2012},
month = jun,
volume = {},
number = {},
pages = {}
}
Refereed Conference Proceedings
Wang, W.-C., Saligram, R., Shamieh, L., Gaidhane, A., Cao, Y., Raychowdhury, A., Datta, S., & Mukhopadhyay, S. (2026, August). Cryogenic Operational Transconductance Amplifier (Under Review). IEEE/ACM International Symposium on Low Power Electronics and Design 2026.
@inproceedings{jrsas24,
author = {Wang, Wei-Chun and Saligram, Rakshith and Shamieh, Laith and Gaidhane, Amol and Cao, Yu and Raychowdhury, Arijit and Datta, Suman and Mukhopadhyay, Saibal},
title = {{C}ryogenic {O}perational {T}ransconductance {A}mplifier (Under Review)},
booktitle = {{{IEEE/ACM} {I}nternational {S}ymposium on {L}ow {P}ower {E}lectronics and {D}esign 2026}},
year = {2026},
month = aug,
publisher = {Chicago},
address = {USA},
editor = {},
pages = {}
}
Saligram, R., Gaidhane, A., Cao, Y., Datta, S., & Raychowdhury, A. (2024, August). Cooling the Chaos : Mitigating the Effect of Threshold Voltage Variation in Cryogenic CMOS Memories . IEEE/ACM International Symposium on Low Power Electronics and Design 2024.
@inproceedings{racsa24,
author = {Saligram, Rakshith and Gaidhane, Amol and Cao, Yu and Datta, Suman and Raychowdhury, Arijit},
title = {{C}ooling the {C}haos : {M}itigating the {E}ffect of {T}hreshold {V}oltage {V}ariation in {C}ryogenic {CMOS} {M}emories },
booktitle = {{IEEE/ACM} {I}nternational {S}ymposium on {L}ow {P}ower {E}lectronics and {D}esign 2024},
year = {2024},
month = aug,
publisher = {Newport Beach},
address = {USA},
editor = {},
pages = {}
}
Shamieh, L. A., Wang, W.-C., Saligram, R., Zhang, S., Gaidhane, A., Cao, Y., Raychowdhury, A., Datta, S., & Mukhopadhyay, S. (2024, August). Cryogenic Operation of Compute-in-Memoey based Spiking Neural Network. IEEE/ACM International Symposium on Low Power Electronics and Design 2024.
@inproceedings{spiking,
author = {Shamieh, Laith A. and Wang, Wei-Chun and Saligram, Rakshith and Zhang, Shida and Gaidhane, Amol and Cao, Yu and Raychowdhury, Arijit and Datta, Suman and Mukhopadhyay, Saibal},
title = {{C}ryogenic {O}peration of {C}ompute-in-{M}emoey based {S}piking {N}eural {N}etwork},
booktitle = {{IEEE/ACM} {I}nternational {S}ymposium on {L}ow {P}ower {E}lectronics and {D}esign 2024},
year = {2024},
month = aug,
publisher = {Newport Beach},
address = {USA},
editor = {},
pages = {}
}
Saligram, R., Gaidhane, A., Cao, Y., Datta, S., & Raychowdhury, A. (2024, June). Cooling the Chaos : Mitigating the Effect of Threshold Voltage Variation in Cryogenic CMOS Memories (WIP Poster) . IEEE/ACM Design Automation Conference (DAC) 2024.
@inproceedings{racsa_wip24,
author = {Saligram, Rakshith and Gaidhane, Amol and Cao, Yu and Datta, Suman and Raychowdhury, Arijit},
title = {{C}ooling the {C}haos : {M}itigating the {E}ffect of {T}hreshold {V}oltage {V}ariation in {C}ryogenic {CMOS} {M}emories ({WIP} {P}oster) },
booktitle = {{{IEEE/ACM} {D}esign {A}utomation {C}onference ({DAC}) 2024}},
year = {2024},
month = jun,
publisher = {San Francisco},
address = {USA},
editor = {},
pages = {}
}
Singh, M., Datta, R., Saligram, R., Saha, P., Mukhopadhyay, S., Datta, S., & Kumar, S. (2024, March). Machine Learning Enabled High Precision and Fast Thermal Model of Nanoscale Transistors. Government Microrecruit Applications and Critical Technology Conference (GOMACTECH) 2024.
@inproceedings{mrrssa24,
author = {Singh, Mayur and Datta, Rinku and Saligram, Rakshith and Saha, Priyabrata and Mukhopadhyay, Saibal and Datta, Suman and Kumar, Satish},
title = {{M}achine {L}earning {E}nabled {H}igh {P}recision and {F}ast {T}hermal {M}odel of {N}anoscale {T}ransistors},
booktitle = {{G}overnment {M}icrorecruit {A}pplications and {C}ritical {T}echnology {C}onference ({GOMACTECH}) 2024},
year = {2024},
month = mar,
publisher = {USA},
address = {New York},
editor = {},
pages = {}
}
Wang, W.-C., Saligram, R., Sharma, S., Lee, M., Gaidhane, A., Cao, Y., Raychowdhury, A., Datta, S., & Mukhopadhyay, S. (2023, December). Cool-CIM: Cryogenic Operation of Analog Compute-In-Memory for Improved Power-Efficiency. IEEE International Electron Device Meeting (IEDM) 2023.
@inproceedings{jrsas23,
author = {Wang, Wei-Chun and Saligram, Rakshith and Sharma, Sudarshan and Lee, Minah and Gaidhane, Amol and Cao, Yu and Raychowdhury, Arijit and Datta, Suman and Mukhopadhyay, Saibal},
title = {{Cool-CIM:} {C}ryogenic {O}peration of {A}nalog {C}ompute-{I}n-{M}emory for {I}mproved {P}ower-{E}fficiency},
booktitle = {{IEEE} {I}nternational {E}lectron {D}evice {M}eeting ({IEDM}) 2023},
year = {2023},
month = dec,
publisher = {San Francisco},
address = {USA},
editor = {},
pages = {}
}
Saligram, R., Datta, S., & Raychowdhury, A. (2023, August). Cryogenic CMOS as an Enabler for Low Power Dynamic Logic. ACM/IEEE International Symposium on Low Power Electronics and Design 2023.
@inproceedings{rsa23,
author = {Saligram, Rakshith and Datta, Suman and Raychowdhury, Arijit},
title = {{C}ryogenic {CMOS} as an {E}nabler for {L}ow {P}ower {D}ynamic {L}ogic},
booktitle = {{ACM/IEEE} {I}nternational {S}ymposium on {L}ow {P}ower {E}lectronics and {D}esign 2023},
year = {2023},
month = aug,
publisher = {Austria},
address = {Vienna},
editor = {},
pages = {}
}
Herr, A., Saligram, R., Van-Winckel, S., Glass, J., Perumkunnil, M., Ashby, T., Brebels, S., Ravex, A., Banerjee, A., & Herr, Q. (2022, October). Dual Temperature Memory Hierarchy and High Speed High Density Data Links for Superconducting Digital Systems . Applied Superconductivity Conference 2022.
@inproceedings{imec-1,
author = {Herr, Anna and Saligram, Rakshith and Van-Winckel, Steven and Glass, Joseph and Perumkunnil, Manu and Ashby, Tom and Brebels, Steven and Ravex, Allen and Banerjee, Aritra and Herr, Quintin},
title = {{D}ual {T}emperature {M}emory {H}ierarchy and {H}igh {S}peed {H}igh {D}ensity {D}ata {L}inks for {S}uperconducting {D}igital {S}ystems },
booktitle = {Applied Superconductivity Conference 2022},
year = {2022},
month = oct,
publisher = {USA},
address = {Hawaii},
editor = {},
pages = {}
}
Chakraborty, W., Shreshta, P., Gupta, A., Saligram, R., Spetalnick, S., Campbell, J., Raychowdhury, A., & Datta, S. (2022, June). Multi-bit per-cell 1T SiGe Floating Body RAM for Cache Memory in Cryogenic Computing . IEEE VLSI Technology Symposium (VLSI) 2022.
@inproceedings{rwssas20,
author = {Chakraborty, Wriddhi and Shreshta, Pragya and Gupta, Aniket and Saligram, Rakshith and Spetalnick, Samuel and Campbell, Jason and Raychowdhury, Arijit and Datta, Suman},
title = {{M}ulti-bit per-cell 1{T} {S}i{G}e {F}loating {B}ody {RAM} for {C}ache {M}emory in {C}ryogenic {C}omputing },
booktitle = {{IEEE} {VLSI} {T}echnology {S}ymposium ({VLSI}) 2022},
year = {2022},
month = jun,
publisher = {USA},
address = {Hawaii},
editor = {},
pages = {}
}
Chakraborty, W., Saligram, R., Gupta, A., Jose, M. S., Aabrar, K. A., Dutta, S., Khanna, A., Raychowdhury, A., & Datta, S. (2021, December). Pseudo-Static 1T Capacitorless DRAM using 22nm FDSOI for Cryogenic Cache Memory. 67th IEEE International Electron Device Meeting (IEDM) 2021.
@inproceedings{rnwksa20,
author = {Chakraborty, Wriddhi and Saligram, Rakshith and Gupta, Aniket and Jose, Matthew San and Aabrar, Khandker Akif and Dutta, Sourav and Khanna, Abhishek and Raychowdhury, Arijit and Datta, Suman},
title = {{P}seudo-{S}tatic 1{T} {C}apacitorless {DRAM} using 22nm {FDSOI} for {C}ryogenic {C}ache {M}emory},
booktitle = {67th {IEEE} {I}nternational {E}lectron {D}evice {M}eeting ({IEDM}) 2021},
year = {2021},
month = dec,
publisher = {USA},
address = {San Francisco},
editor = {},
pages = {}
}
Chakraborty, W., Aabrar, K. A., Gomez, J., Saligram, R., Raychowdhury, A., & Datta, S. (2021, May). Cryogenic RF CMOS on 22nm FDSOI Platform with Record fT=495GHz and fMAX=497GHz. VLSI Technology Symposia, 2021.
@inproceedings{wajraps20,
author = {Chakraborty, Wriddhi and Aabrar, Khandker Akif and Gomez, Jorge and Saligram, Rakshith and Raychowdhury, Arijit and Datta, Suman},
title = {{C}ryogenic {RF CMOS} on 22nm {FDSOI} {P}latform with {R}ecord fT=495{GH}z and f{MAX}=497{GH}z},
booktitle = {{VLSI} {T}echnology {S}ymposia, 2021},
year = {2021},
month = may,
publisher = {Japan},
address = {Virtual},
editor = {},
pages = {}
}
Saligram, R., Datta, S., & Raychowdhury, A. (2021, April). CryoMem: A 4K-300K 1.3GHz eDRAM Macro with Hybrid 2T-Gain-Cell in a 28nm Logic Process for Cryogenic Applications. IEEE Custom Integrated Circuits Conference (CICC) 2021.
@inproceedings{rsa20,
author = {Saligram, Rakshith and Datta, Suman and Raychowdhury, Arijit},
title = {CryoMem: A 4{K}-300{K} 1.3{GH}z e{DRAM} {M}acro with {H}ybrid 2{T}-{G}ain-{C}ell in a 28nm {L}ogic {P}rocess for {C}ryogenic {A}pplications},
booktitle = {{IEEE} {C}ustom {I}ntegrated {C}ircuits {C}onference ({CICC}) 2021},
year = {2021},
month = apr,
publisher = {USA},
address = {Virtual},
editor = {},
pages = {}
}
Saligram, R., Prasad, D., Pietromonaco, D., Raychowdhury, A., & Cline, B. (2021, April). A 64-Bit Arm CPU at Cryogenic temperatures: Design Technology Co-Optimization for Power and Performance. IEEE Custom Integrated Circuits Conference (CICC) 2021.
@inproceedings{rddab20,
author = {Saligram, Rakshith and Prasad, Divya and Pietromonaco, David and Raychowdhury, Arijit and Cline, Brian},
title = {A 64-{B}it {A}rm {CPU} at {C}ryogenic temperatures: {D}esign {T}echnology {C}o-{O}ptimization for {P}ower and {P}erformance},
booktitle = {{IEEE} {C}ustom {I}ntegrated {C}ircuits {C}onference ({CICC}) 2021},
year = {2021},
month = apr,
publisher = {USA},
address = {Virtual},
editor = {},
pages = {}
}
Saligram, R., Kaul, A., Bakir, M., & Raychowdhury, A. (2020, October). A Model Study of Multilevel Signalling for High-Speed Chiplet-to-Chiplet Communication in 2.5D Integration. Proceedings of 28th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2020).
@inproceedings{skbr20,
author = {Saligram, Rakshith and Kaul, Ankit and Bakir, Muhannad and Raychowdhury, Arijit},
title = {A {M}odel {S}tudy of {M}ultilevel {S}ignalling for {H}igh-{S}peed {C}hiplet-to-{C}hiplet {C}ommunication in 2.5{D} {I}ntegration},
booktitle = {{P}roceedings of 28th {IFIP/IEEE} {I}nternational {C}onference on {V}ery {L}arge {S}cale {I}ntegration ({VLSI}-{S}o{C} 2020)},
year = {2020},
month = oct,
publisher = {USA},
address = {Salt Lake City},
editor = {},
pages = {}
}
Saligram, R., Jyoti, K. N. N., & Patel, K. S. V. (2018, December). Quarternary Digital Circuits design using Carbon Nanotube FETs. Proceedings of IEEE International Conference on Networking, Embedded and Wireless Systems.
@inproceedings{sjv18,
author = {Saligram, Rakshith and Jyoti, {KN Naga} and Patel, {K S Vasundara}},
title = {Quarternary Digital Circuits design using Carbon Nanotube FETs},
booktitle = {Proceedings of \textsc{IEEE} {I}nternational {C}onference on {N}etworking, {E}mbedded and {W}ireless {S}ystems},
year = {2018},
month = dec,
publisher = {},
address = {Bangalore},
editor = {},
pages = {}
}
Saligram, R., Abhilash, P., & Patel, K. S. V. (2018, December). Realization of Multivalued Logic Combinational Circuits in Fully Depleted Silicon on Insulator. Proceedings of IEEE International Conference on Networking, Embedded and Wireless Systems.
@inproceedings{sav18,
author = {Saligram, Rakshith and Abhilash, P and Patel, {K S Vasundara}},
title = {Realization of {M}ultivalued {L}ogic {C}ombinational {C}ircuits in {F}ully {D}epleted {S}ilicon on {I}nsulator},
booktitle = {Proceedings of \textsc{IEEE} {I}nternational {C}onference on {N}etworking, {E}mbedded and {W}ireless {S}ystems},
year = {2018},
month = dec,
publisher = {},
address = {Bangalore},
editor = {},
pages = {}
}
Bairy, B., Craig, T. S., Gonde, K., Gupta, N., Prajogi, A., Wilner, M., & Saligram, R. (2016, June). Towards mitigating the impact of NBTI and PBTI Degradation. Proceedings of 2nd World Congress on Automation and Robotics Conference.
@inproceedings{bcggpws16,
author = {Bairy, Bhuvana and Craig, T. Soren and Gonde, Kalyani and Gupta, Naman and Prajogi, Andrew and Wilner, Mary and Saligram, Rakshith},
title = {Towards mitigating the impact of {NBTI} and {PBTI} {D}egradation},
booktitle = {Proceedings of 2nd {W}orld {C}ongress on {A}utomation and {R}obotics {C}onference},
year = {2016},
month = jun,
volume = {},
number = {},
pages = {},
address = {Pennsylvania}
}
Saligram, R. (2013, December). Design of Low Logical Cost Conservative Reversible Adders using Novel PCTG. Proceedings of IEEE 4th International Symposium on Electronic System Design.
@inproceedings{s13a,
author = {Saligram, Rakshith},
title = {Design of {L}ow {L}ogical {C}ost {C}onservative {R}eversible {A}dders using {N}ovel {PCTG}},
booktitle = {Proceedings of \textsc{IEEE} 4th {I}nternational {S}ymposium on {E}lectronic {S}ystem {D}esign},
year = {2013},
month = dec,
publisher = {Singapore},
address = {},
editor = {},
pages = {}
}
Saligram, R. (2013, December). Design and Implementation of Logical Cost Efficient Nanometric Fault Tolerant Reversible BCD Adder. Proceedings of IEEE 10th INDICON.
@inproceedings{s13,
author = {Saligram, Rakshith},
title = {Design and {I}mplementation of {L}ogical {C}ost {E}fficient {N}anometric {F}ault {T}olerant {R}eversible {BCD} {A}dder},
booktitle = {Proceedings of \textsc{IEEE} 10th \textsc{INDICON}},
year = {2013},
month = dec,
volume = {},
number = {},
pages = {},
address = {IIT Bombay}
}
Saligram, R., & Ravishankar, R. (2013, October). Design of Low Logical Cost Adders using Novel Parity Conserving Toffoli Gate. Proceedings of IEEE International Conference on Emerging Trends in Communication, Control, Signal Processing and Computing Applications.
@inproceedings{r13,
author = {Saligram, Rakshith and Ravishankar, Rakshith},
title = {Design of {L}ow {L}ogical {C}ost {A}dders using {N}ovel {P}arity {C}onserving {T}offoli {G}ate},
booktitle = {Proceedings of {IEEE} {I}nternational {C}onference on {E}merging {T}rends in {C}ommunication, {C}ontrol, {S}ignal {P}rocessing and {C}omputing {A}pplications},
year = {2013},
month = oct,
publisher = {},
address = {},
editor = {},
pages = {}
}
Ravishankar, R., & Saligram, R. (2013, March). Design of High Speed Low Power Multiplier using Reversible logic: a Vedic Mathematical Approach. Proceedings of IEEE International Conference on Circuits Power and Computing Technologies.
@inproceedings{sr13,
author = {Ravishankar, Rakshith and Saligram, Rakshith},
title = {Design of High Speed Low Power Multiplier using Reversible logic: a Vedic Mathematical Approach},
booktitle = {Proceedings of \textsc{IEEE} {I}nternational {C}onference on {C}ircuits {P}ower and {C}omputing {T}echnologies},
year = {2013},
month = mar,
publisher = {},
address = {},
editor = {},
pages = {}
}
Saligram, R., & Ravishankar, R. (2013). Contemplation of synchronous Gray Code counter and its variants using reversible logic gates. Proceedings of IEEE International Conference on Information and Communication Technologies.
@inproceedings{srb,
author = {Saligram, Rakshith and Ravishankar, Rakshith},
title = {Contemplation of synchronous Gray Code counter and its variants using reversible logic gates},
booktitle = {Proceedings of \textsc{IEEE} {I}nternational {C}onference on {I}nformation and {C}ommunication {T}echnologies},
year = {2013},
publisher = {},
address = {},
editor = {},
pages = {}
}
Ravishankar, R., & Saligram, R. (2013). Parity preserving logic based fault tolerant reversible ALU. Proceedings of IEEE International Conference on Information and Communication Technologies.
@inproceedings{src,
author = {Ravishankar, Rakshith and Saligram, Rakshith},
title = {Parity preserving logic based fault tolerant reversible {ALU}},
booktitle = {Proceedings of \textsc{IEEE} {I}nternational {C}onference on {I}nformation and {C}ommunication {T}echnologies},
year = {2013},
publisher = {},
address = {},
editor = {},
pages = {}
}
Saligram, R., & Ravishankar, R. (2013). Optimized Reversible Vedic Multipliers for High Speed Low Power Operations. Proceedings of IEEE International Conference on Information and Communication Technologies.
@inproceedings{sra,
author = {Saligram, Rakshith and Ravishankar, Rakshith},
title = {Optimized Reversible Vedic Multipliers for High Speed Low Power Operations},
booktitle = {Proceedings of \textsc{IEEE} {I}nternational {C}onference on {I}nformation and {C}ommunication {T}echnologies},
year = {2013},
publisher = {},
address = {},
editor = {},
pages = {}
}
Saligram, R., & Ravishankar, R. (2013). Towards the Design of Fault Tolerant Reversible Circuits Components of ALU using New PCMF Gate. Proceedings of IEEE International Conference on Advances in Computing, Communication and Informatics.
@inproceedings{sr,
author = {Saligram, Rakshith and Ravishankar, Rakshith},
title = {Towards the {D}esign of {F}ault {T}olerant {R}eversible {C}ircuits {C}omponents of \textsc{ALU} using {N}ew \textsc{PCMF} {G}ate},
booktitle = {Proceedings of \textsc{IEEE} {I}nternational {C}onference on {A}dvances in {C}omputing, {C}ommunication and {I}nformatics},
year = {2013},
publisher = {},
address = {},
editor = {},
pages = {}
}