Welcome!

This is the group website for Circuits Harware and Integration Research Advances Lab (CHIRAL). We are in the Department of Electrical and Computer Engineering at the University of Tennessee Knoxville. (Go Vols!). Our research group explores the frontiers of cryogenic CMOS circuits, heterogeneous integration, and hardware architectures for next-generation computing-from quantum interfaces to high-performance data centers.

We work across the design stack from Design Technology Co Optimization (DTCO) to circuits and systems. We drive architectural innovation through the full silicon lifecycle—from initial design and tape-out to experimental validation—within advanced, scaled CMOS nodes. Our expertise extends to compact device modeling and the characterization of on-chip and inter-die interconnects, providing the foundational models necessary for accurate cross-hierarchy simulation.

We are looking for highly motivated Graduate and Undergraduate students. Please browse through the website to know more about our work and reach out to us if you are interested.

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About me

I am an Electrical and Computer Engineering Professor working in circuit design and low power VLSI. I received my Masters degree in Electrical Engineering from the University of Southern California (USC) in 2016 and went on to earn my PhD from Georgia Institute of Technology Electrical and Computer Engineering in 2024. I worked for a brief stint at Intel Corporation in Folsom California from 2016 to 2018. I have also had the opportunity to work as research intern at Arm and IMEC. I am currently an Assistant Professor in the Department of Electrical Engineering and Computer Science at the University of Tennessee Knoxville.